(PLL) A very efficient corrective circuit that acts as a phase detector. It compares the frequency of a known oscillator with a received signal and uses the output of the detector to keep the oscillator in phase with the incoming frequency.
a circuit designed to minimize the phase difference between two signals
A circuit in which a crystal oscillator is used as a time base for a voltage controlled oscillator maintaining frequency and phase lock between the two oscillators. This is a useful technique for achieving a frequency programmable crystal oscillator and output frequencies that are out of the range of a crystal manufactured to achieve certain performance specifications. However, short term frequency stability is one or two orders of magnitude worse than for a true crystal oscillator.
A circuit which synchronizes an adjustable oscillator with another oscillator by the comparison of phase between the two signals.
is a negative phase feedback technique for extracting a synchronous clock from an input signal. Implementations range from purely analog to various combinations of analog with digital and software. Second order loops are generally used in PCM bit syncs because of their strong retention and stability characteristics.
(PLL). A circuit containing an oscillator whose output phase or frequency locks onto and tracks the phase or frequency of a reference input signal. To produce the locked condition, the circuit detects any phase difference between the two signals and generates a correction voltage that is applied to the oscillator to adjust its phase or frequency.
A circuit containing a voltage-controlled oscillator whose output phase or frequency can be "steered" to keep it in sync with a reference source. A PLL circuit is generally used to lock onto and "up-convert" the frequency of a stable source.
An oscillator which incorporates feedback in an effort to produce a more perfect sine wave. A phase locked loop can be part of a very sophisticated oscillator called a synthesizer.
