Definitions for "CAS latency"
Keywords:  latency, clock, cas, column, delay
see CAS and CAS 3
CAS latency is the number of clock cycles it takes before a column on a DRAM chip can be addressed. Latency is a measure of delay, so a "CL2" CAS latency factor represents a two-clock cycle delay, and a "CL3" latency factor represents a three-clock cycle delay.
One of the most important latency (wait) delays (expressed in clock cycles) when data is accessed on a memory module. Once the data read or write command and the row/column addresses are loaded, CAS Latency represents the (final) wait time until the data is ready to be read or written.