Definitions for "Cache Coherency"
Hardware support on SMP systems to ensure that each processor's cache has a consistent view of the data in main memory
The synchronization of data in multiple caches so that reading a memory location through any cache will return the most recent data written to that location through any other cache. Sometimes called cache consistency.
In a shared memory multiprocessor with a separate cache memory for each processor, it is possible to have many copies of any one instruction operand: one copy in the main memory and one in each cache memory. When one copy of an operand is changed, the other copies of the operand must be changed also. Cache coherency is defined as those changes in the values of shared operands which are propagated throughout the system in a timely fashion.