Non recurring engineering costs. i.e paid once per design.
(See "non-recurring engineering")
Refers to a Non Reoccurring Engineering cost which is a charge for designing a custom integration.
Non-Recurring Engineering charges. Start-up cost for the creation of an ASIC, gate array, or Hardwire Pays for layout, masks, and test development. FPGAs and CPLDs do not require NRE.
Non-recurring Engineering. In the world of fixed logic chip design, refers to the one-time, up front costs customers incur in designing a chip. Includes software tools, engineering time, design verification, mask sets and prototypes. In the programmable logic world, usually refers to the expenses associated with converting a PLD design to a fixed logic design to gain a cost reduction.
non-recurring engineering - Engineering activity that is required to design, develop or enhance a product but is not required for the production of an existing product.
See Non-Recurring Engineering Fee